It is well known that transistors in advanced integrated circuits (ICs) are shrinking with each new fabrication technology node, as articulated by Moore's Law. For example, at the 32 nanometer technology node, it is desired to form doped regions in transistors such as source and drain extensions which are less than 10 nanometers deep with average doping densities above 1021 cm−3. Formation of heavily doped shallow regions is problematic because anneals sufficient to repair damage to the IC substrate cause dopants to diffuse deeper than desired.